The first 2017 brought into being, The open interconnect standard Compute Express Link, or CXL for short, has now been expanded to include the first data for specification 2.0. Even if CXL can already bring together big names in its consortium with Intel, NVIDIA, AMD, ARM and much more, so far there is little or no hardware that CXL actually implements.

This will change 2021 with the introduction of the first PCI Express 5.0 hardware, because CXL uses PCIe as physical transmission technology and will only achieve the transmission speeds and other requirements with PCIe 5.0 in order to be functional as an interconnect. CXL was launched by Intels and contains three protocols that represent the different usage profiles for such an interconnect: CXL.io, CXL.cache and CXL.memory.

With CXL 2.0, the Functional scope once again significantly expanded and adapted to what the participating companies consider important for the coming years.

One of these functions is switching, which enables the often limited connection of the host does not have any influence on the connection of individual devices connected via CXL. Let’s imagine a PCIe 5.0 connection with 16 Lanes to which four clients are to be connected. Each client would only have four lanes available here. In this example, however, CXL switches provide all clients with the full 16 Lanes are available and the host is also connected to this switch with 16 Lanes connected. The bottleneck in the host switch connection is often not that problematic, as it is more important that the individual devices can work with each other with the full bandwidth.

It is also possible here that different CXL standards (1.0, 1.1, 2.0) work together and the full range of functions is still available to the CXL 2.0 hardware, even if other hardware only supports CXL 1.0 or 1.1. For a CXL switch it is also possible that there are several hosts (root ports).

CXL 2.0 supports persistent memory

Another innovation is the support for Persistent Memory (PMEM). As the largest supplier, Intel already has one or more products on the market as Optane DC Persistent Memory that serve as an interim solution between DRAM and NAND. So far, however, this memory has been connected directly to the memory interface of the processor.

CXL.memory is therefore expanded to include support for PMEM and thus offers the possibility of using such a memory system-wide and not only as an extension of the main memory.