In terms of reporting and external perception, a lot in the IT environment is concentrated on processors, GPU accelerators and, if necessary, a few special solutions in the AI ​​area. We often speak of centralized solutions (not in the form of large data centers or supercomputers) in which enormous amounts of data are processed. Another field of applications is plowed by Intel in the form of FPGAs. At the Intel FPGA Technology Day 2021 some announcements were made that we want to shed light on.

But these high ones Data volumes that each user produces themselves or that are created through interaction with the environment make edge computing increasingly important. In edge computing, the calculations and thus the filtering of the data are carried out where they arise. Already today more than 50 zettabytes of data are produced worldwide. This corresponds to an amount of data that is stored on five billion HDDs, each with 10 TB would have to be saved. 2025 according to Intel 175 zettabytes

In order to be able to process this data in a usable way, special hardware is required. For example, NVIDIA introduced the HGX accelerator, which uses the A 50 GPU directly with Mellanox ConnectX-6 Lx SmartNICs is linked. High computing power paired with a fast network connection. Intel offers similar solutions with the Stratix FPGAs.

The chiplet design of the FPGAs from Intel can be adapted to the necessary requirements. A compute tile is combined with a DDR memory controller and high-speed HBM memory. In R, F, P, H and E tiles, for example, PCI Express controllers of different generations or expansion levels of Ethernet controllers can be accommodated. Details can be found in the announcement for the Stratix 10 NX FPGA . For these, Intel is announcing on FPGA Technology Day 2021 that it has started mass production.

The chiplet design of the FPGAs offers more than just one Flexibility in the actual design, but also in production. In this way, the individual tiles can be produced in the manufacturing process in which this is possible or makes economic sense. The chips are then placed on a package via EMIB and Foveros.

The next generation of FPGAs will continue the chiplet design. From the current six series (GX, SX, TX, MX, DX and NX), Intel will then make three series (F, I and M series). These FPGAs originally planned for 2019 should be available in the coming months and use a production specially adapted for FPGAs in 10 nm SuperFin. The 06 nm SuperFin technology is Intel’s lifeline for problematic manufacturing in 10 nm and comes among other things for the tiger Lake processors are used. For the Agilex FPGAs, Intel is planning with DDR5 and PCI-Express 5.0 as well as the CXL interconnect – all of which will be possible as a chiplet add-on.

Intel combines these rather heavyweight FPGAs with the Max – and Cyclone series, which are more cost-effective, but which can also be used closer to the end point of the creation of the data.

The Direct RF FPGA is also being presented as a completely new series. This is explicitly designed for a quick analysis of radio frequency data and should be five times faster than anything else currently available on the market. 64 The chip should be able to record gigasamples per second. However, these performance data are based on projections by Intel, because the Direct RF FPGA has not yet been tested. The Direct RF FPGA is to be used in the field of RF and wireless test equipment, but also in the military. Intel does not specify when the new FPGA series will be shipped.

Intel’s FPGAs can work together with Xeon processors via a coherent interconnect. But Intel is also bringing its own products together with FPGAs in other areas. So it is possible to equip them with Optane DC Persistent Memory (instead of DDR memory).