Intel and Synopsys announced that they have demonstrated interoperability among the next generation of CPUs Xeon Scalable , codenamed “ Sapphire Rapids “, and the solution set PCI Express 5.0 from Synopsis. More specifically we talk about the DesignWare controller and the entire physical layer dedicated to PCI Express 5.0, a “package” will be the basis of many chips made with FinFET processes between 16 and 5 nanometers that will end up in SSDs, network cards and other solutions.

The demonstration indicates that the products that will support PCI Express 5.0 thanks to the technologies of Synopsis will work with 4th Generation Intel Xeon Scalable CPUs to their full potential, with a transfer rate of 32 GT / s . This is a fundamental step, which in some way signals the maturity of the Sapphire Rapids project and which gives the confidence to other companies that they can rely on Synopsys technologies to create PCIe 5.0 products compatible with the next generation Intel platform.

Sapphire Rapids CPUs, made at 10 nanometers , will arrive in the server sector next year (we will also see them in the Aurora and Crossroads supercomputers) with support for DDR5 memory , PCI Express 5.0 and CXL 1.1 interconnection , as well as several other innovations such as the Advanced Matrix Extensions dedicated to deep learning, Data Streaming Accelerator (DSA) technology and support for new instructions such as AVX 512 _ BF 16 and AVX 512 _ VP2INTERSECT to speed up and face new workloads.