New pinout details and I/O information regarding Intel’s upcoming Core Ultra 200 series CPUs codenamed Arrow Lake-S and its associated LGA1851 socket have surfaced. Jaykihn0 on X (Twitter) purportedly showed off a complete layout of the LGA1851 socket, along with details surrounding Lunar Lake and Arrow Lake’s I/O configuration.
Jay’s information reveals that Arrow Lake’s I/O connectivity barely changes compared to Intel’s outgoing 14th-gen, 13th-gen, and 12th-gen processors. The only change being added to Arrow Lake-S is the addition of one extra USB 2 port to the PCH. Everything else remains the same, including the PCIe 5.0 support, featuring support for a single x16 slot and one x4 M.2 SSD, and the PCIe 4.0 support, which includes a whole host of connectivity such as secondary PCIe slots, Gigabit Ethernet, and SATA ports.
With just a single change to the USB 2 configuration, Arrow Lake-S on the connectivity side virtually changes nothing. You will be disappointed if you want to upgrade to Arrow Lake-S for expanded connectivity. We hoped that Intel would provide some noteworthy additions, such as PCIe 5.0 integration on the PCH (chipset) or expanded Thunderbolt support (like native Thunderbolt 5 integration), but that wasn’t meant to be the case.
It’s worth mentioning that these changes only apply to what Arrow-Lake can do with native connectivity alone. We will inevitably see high-end LGA1851 motherboards featuring third-party controllers for adding things like additional USB ports, Thunderbolt ports, and USB 4 ports for power users who need more than what the Arrow-Lake platform can give.
Lunar Lake is quite different from Arrow Lake. Intel’s upcoming mobile CPU architecture’s I/O has been reshuffled to support more modern I/O standards. Lunar Lake supports up to six USB 2 ports, two USB 3 ports, and, for the first time, two USB 3.2 Gen 2×1 ports. The PCIe count has been reduced compared to Alder Lake and Raptor Lake mobile, sporting up to four lanes of PCIe 5.0 support, three lanes of PCIe 4.0 support, and one extra PCIe 4.0 lane for Gigabit ethernet.
However, the flip side is that Lunar Lake will support UFS storage natively for the first time. UFS, or Universal Flash Storage, is a standard used extensively in smartphones and tablets. Despite being known as a sluggish performing standard for years, recent iterations of the UFS—particularly UFS 3.0, 3.1, and 4.0—have massively improved UFS’ bandwidth potential, with UFS 4.0 compatible storage solutions boasting speeds that rival some slower PCIe 3.0 NVMe M.2 SSDs.
As a result, it makes sense for Intel to integrate UFS into Lunar Lake as a native storage solution. Regardless, Lunar Lake’s PCIe lane count is substantially less than Alder Lake’s, but Intel almost certainly did this to boost power efficiency. Lunar Lake’s I/O comes exclusively through the SOC, which wasn’t the case with Alder Lake, which had I/O come from three different parts of the chip. This will help boost power efficiency for Lunar Lake, having everything under the domain of one unit.